Headshot of Michael Denis

Hardware & FPGA Engineer — RTL / Verification

Welcome to my website. My name is Michael. I’m an EE undergrad heading into grad school, passionate about all things low-level. Here you can learn more about me and explore projects I’ve built—and the ones I’m building now. If you think I’d be a great fit, or you just want to get in touch, feel free to reach out.

Location
Miami, FL · Open to relocation
Links
LinkedIn · GitHub

RTL & FPGA

  • VHDL
  • SystemVerilog
  • Verilog
  • STA/SDC/CDC
  • Synthesis & P&R
  • Timing Closure

Verification

  • cocotb
  • Waveform Debug

Embedded & Software

  • C
  • C++
  • Python
  • Linux
  • Bash/Make
  • Git
  • GCC/GDB
  • Raspberry Pi
  • UART
  • SPI
  • MMIO

Tools & Devices

  • Vivado
  • Quartus Prime
  • Gowin IDE
  • ModelSim/Questa
  • GHDL
  • Verilator/GTKWave
  • KiCad
  • Arria 10 GX
  • Cyclone V
  • Gowin GW5A

Portfolio

Education

BS, Electrical Engineering — University of Miami (Expected Dec 2025)

MS, Electrical & Computer Engineering — University of Miami (Anticipated May 2028)

Experience

Systems Engineering Co-op

RoviSys Building Technologies — Cleveland, OH
  • Merged I/O lists, standardized pin maps & panel schedules for first-pass bring-up.
  • Implemented deterministic fan-control ladder logic with deadband & interlocks; built HMI screens.
  • PLC
  • RIO
  • HMI
  • Controls

Electrical Intern

TLC Engineering Solutions — Miami, FL
  • Produced NEC-compliant 2D electrical designs in Revit: wiring, lighting, power distribution.
  • Collaborated across an 8-engineer team on three commercial/residential projects.
  • Revit
  • NEC
  • Wiring
  • Lighting

Teaching Assistant

University of Miami — College of Engineering
  • ECE 118 (C++) and ECE 316 (VHDL): labs, office hours, grading for 50+ students.
  • Validated designs in ModelSim/Quartus; emphasized clean clocks/resets, FSMs, and self-checking benches.
  • C++
  • VHDL
  • ModelSim
  • Quartus